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===== Frequently Asked Questions =====
This page is work in progress and therefore subject to change
All TQ Systems products come with comprehensive documentation to help you get started and integrate our hardware into your designs.
==== Publicly Available User Manuals & Datasheets ====
The following documents can be downloaded directly from our [[https://www.tq-group.com/de/produkte/tq-embedded/arm-architektur|Website]] (no login required) for the desired product: \\
**User Manual (Baseboard)** \\
Detailed hardware descriptions, installation steps, jumper settings, connector layouts and troubleshooting tips. \\
**User Manual (Module)** \\
Electrical specifications, interface overviews, software setup guides and reference tables. \\
**Datasheets** \\
Absolute maximum ratings, timing diagrams and ordering information.\\
==== Customer Info Archive (Starter Kit Customers) ====
The **Customer Info Archive** is provided upon purchase of an official Starter Kit and is released manually by TQ Support. To obtain it, please open a [[https://ibsd.tq-group.com/plugins/servlet/desk/portal/17|Support Ticket]] with your order details.
__**The archive includes:**__
* **Mainboard schematic & placement diagram**
* **Module CAD files** (native format)
* **Module mechanical dimensions** (2D/3D drawings)
* **Pinmuxing configuration** (recommended device tree fragments)
* **Pinout reference** (signal assignments, voltage domains)
* **Design checklist** (layout guidelines, EMI/ESD considerations)
* **Processing instructions** (LGA Modules)
The NXP Secure Provisioning Tool can generate a Manufacturing Package that contains the binary to be flashed and platform-specific scripts (Mac, Linux, Windows) with your exact manual flashing configuration. You can create this package in the "Write image" tab of the Secure Provisioning Tool by clicking the button next to "Start flashloader".
The example linker script MIMXRT1176xxxxx_cm7_ram.ld in the BSP repository shows how to properly configure and utilize the different internal RAM regions of the RT1170 processor. It demonstrates optimal memory allocation by placing code in fast ITCM, non-cacheable data in OCRAM1, and regular data/stack/heap in OCRAM2 for maximum performance. \\
You can find more information about the internal RAM in the NXP Reference Manual for the RT1170.
The information provided on this wiki page is subject to change due to circumstances beyond our control. While we strive to keep all details as accurate and up-to-date as possible, it is possible that certain updates or changes may go unnoticed for some time. As a result, some sections of this page may contain outdated information. If you notice any mistakes in the documentation, we kindly ask you to inform the TQ Support through our ticket system.