===== Functional DIP Switches =====
DIP-Switch settings for Boot Configuration
DIP switch S3 is used to configure the BOOT_CFG Pins 0 to 3.
^ DIP ^ Function ^ OFF ^ ON ^ Remarks ^
| S3-1 | FLASH_AUTO_PROBE_EN | Disabled | Enabled |
| S3-2 | BENCRYPT_XIP_EN | Disabled | Enabled |
^ DIP ^ Function ^ S3-3 ^ S3-4 ^ Remarks ^
| S3-3 [0]\\ S3-4 [1] | \\ FLASH_PROBE_TYPE | OFF\\ OFF\\ ON\\ ON | OFF\\ ON\\ OFF\\ ON | QuadSPI NOR\\ MXIC Octal\\ Micron Octal\\ Adesto Octal |
| ::: | ::: | ::: | ::: | ::: |
DIP switch S4 is used to configure the BOOT_CFG Pins 4 to 7.
^ Function ^ S4-1 ^ S4-2 ^ S4-3 ^ S4-4 ^
| Serial NOR boot via FlexSP | OFF | OFF | OFF | OFF |
| SD Boot via uSDHC | X | X | ON | OFF |
| eMMC/MMC boot via uSDHC | X | X | OFF | ON |
| SLC NAND boot via SEMC | X | ON | OFF | OFF |
| Serial NAND boot via FlexSPI | X | X | ON | ON |
DIP switch S5 is used to configure the BOOT_CFG Pins 8 to 11.
^ Function ^ S5-1 ^ S5-2 ^ S5-3 ^ Remarks ^
| \\ \\ xSPI_FLASH_TYPE | OFF\\ ON\\ OFF\\ ON\\ OFF\\ ON\\ | OFF\\ OFF\\ ON\\ ON\\ OFF\\ OFF\\ | OFF\\ OFF\\ OFF\\ OFF\\ ON\\ ON\\ | Boot with default 0x03 Read Enabled\\ Reserved\\ HyperFLASH 1V8\\ HyperFLASH 3V0\\ MXIC Octal Read\\ Micron Octal Read\\ |
| ::: | ::: | ::: | ::: | ::: |
^ DIP ^ Function ^ OFF ^ ON ^ Remarks ^
| S5-4 | FLEXSPI_INSTANCE | FLEXSPI1 | FLEXSPI2 |
DIP switch S6 is used to configure the BOOT_MODEs, JTAG and UART.
^ Function ^ S6-1 ^ S6-2 ^ Remarks ^
| \\ Boot_Mode | OFF\\ OFF\\ ON\\ ON | OFF\\ ON\\ OFF\\ ON | Boot from fuses\\ Internal boot\\ Serial downloader\\ Reserved |
| ::: | ::: | ::: | ::: |
^ DIP ^ Function ^ OFF ^ ON ^ Remarks ^
| S6-3 | LPUART1_SWITCH | Freelink | USB Debug Interface |
| S6-4 | JTAG_SWITCH | FreeLink Interface | JTAG Connector |
DIP switch S3 is used to configure the BOOT_CFG Pins 0 to 3.
^ DIP ^ Function ^ OFF ^ ON ^
| S3-1 | Reserved | X | X |
| S3-2 | Port-Select | eSDHC1 | eSDHC2 |
| S3-3 | Loopback Source Sel. | through SD | edirect |
| S3-4 | SD Power Cycle Enable | No power cycle | Enabled via USDHC_RST pad |
DIP switch S4 is used to configure the BOOT_CFG Pins 4 to 7.
^ Function ^ S4-1 ^ S4-2 ^ Remarks ^
| \\ SD/SDXC Speed | OFF\\ OFF\\ ON\\ ON | OFF\\ ON\\ OFF\\ ON | Normal/SDR12\\ High/SDR25\\ SDR50\\ SDR104 |
| ::: | ::: | ::: | ::: |
^ DIP ^ Function ^ OFF ^ ON ^ Remarks ^
| S4-3 | Reserved | - | must be ON |
| S4-4 | Reserved | must be OFF | - |
DIP switch S5 is used to configure the BOOT_CFG Pins 8 to 11.
^ DIP ^ Function ^ OFF ^ ON ^
| S5-1 | Reserved | X | X |
| S5-2 | Bus Width | 1 bit | 4 bit |
| S5-3 | Reserved | X | X |
| S5-4 | Reserved | X | X |
DIP switch S6 is used to configure the BOOT_MODEs, JTAG and UART.
^ Function ^ S6-1 ^ S6-2 ^ Remarks ^
| \\ Boot_Mode | OFF\\ OFF\\ ON\\ ON | OFF\\ ON\\ OFF\\ ON | Boot from fuses\\ Internal boot\\ Serial downloader\\ Reserved |
| ::: | ::: | ::: | ::: |
^ DIP ^ Function ^ OFF ^ ON ^ Remarks ^
| S6-3 | LPUART1_SWITCH | Freelink (X3) | USB Debug interface (X1) |
| S6-4 | JTAG_SWITCH | FreeLink Interface | JTAG Connector |