| Details | |
|---|---|
| Effect | Linux kernel does not start (no more messages after Starting kernel…) |
| Issue | PCIe requires external clock generator |
| Affected Revisions | |
| Bsp | sumo.TQMa8Xx.BSP.SW.0002 sumo.TQMa8.BSP.SW.0005 |
| Module | all revisions |
| Mainboard | MBa8Xx ≤ Rev.0101 |
| Solution | |
| Fix | Upgrade to MBa8Xx Rev.0102 (please contact TQ Support for further information) |
| Workaround | Use devicetree with disabled PCIe interface (will be included in next BSP release) |
| Details | |
|---|---|
| Effect | Some PCIe devices (e.g. PCIe switches) may not be properly detected |
| Issue | PCIe signals clock, enable and reset do not comply to the PCIe specification |
| Affected Revisions | |
| Bsp | ≤ sumo.TQMa8.BSP.SW.0005 |
| Module | all revisions |
| Mainboard | MBa8Xx ≥ Rev.0102 |
| Solution | |
| Fix | TBD |
| Workaround | Limit PCIe speed to Gen1 by using proper devicetree *-pcie-gen1.dtb (provided with BSP release sumo.TQMa8.BSP.SW.0006) |
| Details | |
|---|---|
| Effect | Executing sf probe in U-Boot causes the first byte of the QSPI NOR Flash to be overwritten |
| Issue | QSPI NOR Flash is not suppported in U-Boot |
| Affected Revisions | |
| Bsp | sumo.TQMa8.BSP.SW.0005 |
| Module | all revisions |
| Mainboard | all revisions |
| Solution | |
| Fix | TBD |
| Workaround | N/A |