Embedded module TQMxE40M Documentation


BIOS Overview

BIOS Overview

BIOS Revision BIOS Version CSE Firmware Version BIOS Binary
Rev. 0103 05.43.49.16.05 15.40.16.2485 TQMxE40M_05.43.49.16.05.bin
Rev. 0102 05.43.27.14.03 15.40.15.2416 TQMxE40M_05.43.27.14.03.bin
Rev. 0100 05.42.43.09.01 15.40.0.2066 TQMxE40M_05.42.43.09.01.bin

Changelog

Changelog

05.43.49.16.05

  • Insyde core update to version 05.43.49.0016
    • integrate PINCTRL Patch → enabled
    • close several security vulnerabilities
  • Configure IRQs 7, 9 and 12
    • fix high processor load when interrupt functionality enabled in EAPI driver
  • Define USB overcurrent mapping table to COM Express spec
  • Add additional SPD data for Micron MT53E512M32D1ZW_046

05.43.27.14.03

  • fix not booting system after flash update
  • update GBE UNDI driver
  • add fan control while booting
  • Adapt setup menu
  • Fix not working fan under OS (enable EC lite)
  • Adapt pcie ports showin in SCU
  • Insyde core update to version 05.43.17.0013
  • Support CAN interface in SCU
  • Remove PCIe_CLK_Req pins in GPIO initialization table
  • Adapt setup menu
  • Set SMBIOS data
  • Disable UART Postcode Support
  • Change Default Configuration
    • Serial IO UART 2 <Disabled>
  • Fix not booting system when pressing power button
  • SioTqmx86: Remove USB0 host present information
  • Remove PCIe_CLK_Req pins in GPIO initialization table
  • SioTqmx86: Fix not assuming UART configuration
  • SioTqmx86: Add Serial Port 1 Routing menu
  • Fix not working fan under OS (default configuration)

05.42.43.09.01

  • Set Timeout to 0 seconds
  • Correct Board ID String
  • Do not show Dual or Legacy Boot Type option
  • Reduce SD card speed
  • Adapt setup menu (hide some options)
  • Change Default configuration
  • PSE Configuration
    • UART0 <None>
    • UART1 <None>
    • QEP0 <None>
    • QEP1 <None>
    • QEP2 <None>
    • I2C0 <None>
    • I2C1 <None>
    • I2C6 <None>
    • I2C7 <None>
    • CAN0 <PSE owned with pin muxed>
    • CAN1 <PSE owned with pin muxed>
  • SerialIo Configuration
    • I2C0 Controller <Disabled>
    • I2C2 Controller <Disabled>
    • I2C3 Controller <Disabled>
    • I2C4 Controller <Disabled>
    • I2C6 Controller <Disabled>
    • I2C7 Controller <Disabled>
    • UART0 Controller <Disabled>
    • UART1 Controller <Disabled>
  • Other
    • eMMC 5.1 HS400 Mode <Disabled>
    • HID Event Filter Driver <Disabled>
    • REFRESH_2X_MODE <Enabled for WARM or HOT>
    • eMMC 5.1 Controller <Disabled>
    • SDCard 3.0 Controller <Disabled>
    • C states <Disabled>
    • eMMC 5.1 HS400 Mode <Enabled>
    • Enable HS400 software tuning <Enabled>
    • Audio Link Mode <Advanced Link Config>
    • DMIC #0 [ ]
    • DMIC #1 [ ]
    • SNDW #1 [ ]
    • Additional Serial IO devices [X]
    • HSUART1/RS485 <None>
    • UART2 <Host owned with pin muxed>
    • HSUART2/RS485 <Host owned with pin muxed>
  • Do not restore defaults after CMOS lost
  • Fix not working 4GB memory variant
  • Hide DDR50 eMMC mode
  • Correct memory SPD data (adapt to Intel recommended)
  • Fix not working Ethernet
  • Set Ethernet GPIOs, gpio muxing and variable defaults same as CRB
  • Set CPLD UARTs to fix address and IRQ configuration
  • Set USB3 speed capability to Gen1
  • Enable UFSx2 to fix Power State issue
  • Disable Console Redirection
  • Fix missmatch message in PSE SCU
  • add eMMC driver 1930
  • Set Power Strap VVV SFR_OG_PG to YES
  • SioF81214E: Fix not shown COMs in Win10
  • SioF81214E: Fix not working COMB
  • SioF81214E: Set ASL Device Name Prefix
  • SioF81214E: Change Default base address and IRQ configuration
  • SioF81214E: Fix not shown SSDT table in Windows (RWE)
  • SioF81214E: Configure some PCDs
  • SioF81214E: Enable package
  • SioF81214E: Add package
  • SioTqmx86: Hide LVDS feature when LVDS bridge is not populated
  • SioTqmx86: Add LVDS Clock Spreading menu
  • SioTqmx86: Enable Package
  • SioTqmx86: Add Package from earlier commit
  • Configure Board configuration via DEFINES
  • Configure SerIRQ in eSPI-to-LPC bridge ECE1200
  • use OemSvcLoadDefaultSetupMenu for 3 x reset processing
  • Set Memory SPD data dependend on board GPIOs
  • Set GPIO config in OEM Services
  • Disable I2S Codec Select
  • Delete batch file to prevent notice after build
  • Fix HDA not working (plus line-in used on MB-COME10-2)
  • Add verb table for ALC262 codec
  • Disable some Super IOs not used
  • Integrate TQ Boot Logo
  • Set maximal password length to 20 letters
  • Change InsydeH2O Version shown in SCU
  • Define BoardID as no Intel CRB
  • Reduce ID Read and Write/Erase frequency of SPI
  • Adapt CSE Configuration
  • Add SPI Flashes in VSCC entries
  • Correct Power Straps in Fit
  • Adapt eSPI frequencies and set IO-Modes to single
  • Adapt GPIO voltages
  • Define DQS Map CPU to DRAM mapping
  • Add gitignore file

On-board I2C devices

TBD

  • en/x86/tqmxe40m/bios/bios_overview.txt
  • Last modified: 2022/08/04 15:02
  • by 127.0.0.1