Embedded module TQMxE39M Documentation

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BIOS Overview

BIOS Revision	BIOS Version	TXE Firmware Version	PCI Configurations	BIOS Binary
Rev. 0109 Released for HW-Rev. 0303+	5.12.30.33.43	3.1.90.2628	4×1 PCIe Lanes	TQMxE39M_5.12.30.33.43.bin

Rev. 0108	5.12.30.28.34	3.1.65.2317	4×1 PCIe Lanes	TQMxE39M_5.12.30.28.34.bin
			1×2 + 2×1 PCIe Lanes	TQMxE39M_5.12.30.28.34_PCIe_1x22x1.bin
			1×4 PCIe Lanes	TQMxE39M_5.12.30.28.34_PCIe_1x4.bin

Rev. 0107	5.12.30.28.30	3.1.50.2317	4×1 PCIe Lanes	TQMxE39M_5.12.30.28.30.bin
			1×2 + 2×1 PCIe Lanes	TQMxE39M_5.12.30.28.30_PCIe_1x22x1.bin
			1×4 PCIe Lanes	TQMxE39M_5.12.30.28.30_PCIe_1x4.bin

Rev. 0106	5.12.30.28.22	3.1.50.2317	4×1 PCIe Lanes	TQMxE39M_5.12.30.28.22.bin
Rev. 0106	5.12.30.28.22	3.1.50.2317	1×2 + 2×1 PCIe Lanes	TQMxE39M_5.12.30.28.22_PCIe_1x22x1.bin

Rev. 0105	5.12.30.21.20	3.1.50.2238	4×1 PCIe Lanes	TQMxE39M_5.12.30.21.20.bin
			1×4 PCIe Lanes	TQMxE39M_5.12.30.21.20_PCIe_1x4.bin
			1×2 + 2×1 PCIe Lanes	TQMxE39M_5.12.30.21.20_PCIe_1x22x1.bin

Rev. 0104	5.12.30.21.18	3.1.50.2238	4×1 PCIe Lanes	TQMxE39M_5.12.30.21.18.bin
			1×4 PCIe Lanes	TQMxE39M_5.12.30.21.18_PCIe_1x4.bin
			1×2 + 2×1 PCIe Lanes	TQMxE39M_5.12.30.21.18_PCIe_1x22x1.bin

Rev. 0103	5.12.30.21.12	3.1.50.2238	4×1 PCIe Lanes	TQMxE39M_5.12.30.21.12.bin
			1×4 PCIe Lanes	TQMxE39M_5.12.30.21.12_PCIe_1x4.bin
			1×2 + 2×1 PCIe Lanes	TQMxE39M_5.12.30.21.12_PCIe_1x22x1.bin

Rev. 0102	5.12.09.16.07	3.1.50.2222	4×1 PCIe Lanes	TQMxE39M_5.12.09.16.07.bin
			1×4 PCIe Lanes	TQMxE39M_5.12.09.16.07_PCIe_1x4.bin
			1×2 + 2×1 PCIe Lanes	TQMxE39M_5.12.09.16.07_PCIe_1x22x1.bin

Rev. 0101	5.12.09.16.05	3.0.20.1139	4×1 PCIe Lanes	TQMxE39M_5.12.09.16.05.bin
			1×4 PCIe Lanes	TQMxE39M_5.12.09.16.05_PCIe_1x4.bin
			1×2 + 2×1 PCIe Lanes	TQMxE39M_5.12.09.16.05_PCIe_1x22x1.bin

Rev. 0100	5.11.47.13.04	3.0.11.1131	4×1 PCIe Lanes	TQMxE39M_5.11.47.13.04_release.bin
			1×4 PCIe Lanes	TQMxE39M_5.11.47.13.04_release_pcie1x4.bin
			1×2 + 2×1 PCIe Lanes	TQMxE39M_5.11.47.13.04_release_pcie1x2_2x1.bin

Changelog

5.12.30.33.43

Insyde Core Update to tag 05.12.30.0033 plus additional IB trunks
Close following security vulnerabilities
- CVE-2021-41839
- CVE-2021-41841
- CVE-2021-41840
- CVE-2020-27339
- CVE-2021-42060
- CVE-2021-42113
- CVE-2021-43522
- CVE-2022-24069
- CVE-2021-43615
- CVE-2021-41837
- CVE-2021-41838
- CVE-2021-33627
- CVE-2021-45971
- CVE-2021-33626
- CVE-2021-45970
- CVE-2021-45969
- CVE-2022-24030
- CVE-2021-42554
- CVE-2021-33625
- CVE-2022-24031
- CVE-2021-43323
- CVE-2021-42059
Change Default configuration
- DTS <Disabled>
Disable Super I/Os not used
- SioNpcE285
Add verb table vor audio codec ALC262
Define USB Overcurrent pins

5.12.30.28.34

Enable 2N mode for 8GB memory configuration
Change Default Configuration
- eMMC Max Speed <HS200>

5.12.30.28.30

update H2OUVE package to tag 05.31.28
add eMMC selection mode
add new SD-MMC driver 1930

5.12.30.28.22

core update to tag_05.12.30.0028
- Update SIC code to 1.1.1
- improve realtime behavior

5.12.30.21.18

Add Smart Battery Switch in BIOS Menu
Support F1-Stepping:
- Update PMC Version
- Update Microcode
- Update SIC Version
- Update GPIO configuration to fix SD-Card functionality

5.12.30.21.12

core update to tag_05.12.30.0021
- close security gap spectre variant 2, 3a and 4
- fix 'State after G3' issue
- fix USB 3.0 not working
adapt setup menu
- unhide “OS Reset Select”
- hide “BIOS Boot Source” information
fix H2OUVE default bug of LFP configuration
integrate MRC patch to fix ECC issue (stop booting with postcode 30)
use old InsydeCrPkg to fix boot stop with postcode 0x0C84 or 0x004D
fix not working SPI flash GD 25LQ128D
support coinless Apl-I BIOS
support Smart Battery

5.12.09.16.07

enable all PCIe Root Ports
integrate new TXE FW 3.1.50.2222
Fix wrong negative temperature values
Correct temperature string
add UEFI-LVDS and adapt to TQMxE39M
Adapt setup menu
- Unhide “Wake On PME”
- Unhide “DTS”

5.12.09.16.05

update to Insyde BIOS 05.12.09.0016
update setup defaults (Memory Scrambler > disabled)
adapt setup menu: hide more menus
fix not working Single Power Button Event
Implement fan scaling configuration
update SioNct7802y package supporting Form Browser
support form browser
make IRQ 5, 6 and 7 adjustable
fix not booting from external flash
GPIO configuration were adapted to increase lifetime of pins
fix not working Console Redirection

5.11.47.13.04

update to Insyde BIOS 05.11.47.0013
update setup defaults
- PCI Express Root Port 1 enabled
- PCI Express Root Port 2 disabled (not connected on TQMxE39M)
- PCI Express Root Port 3 enabled
- PCI Express Root Port 4 enabled
- PCI Express Root Port 5 enabled
- PCI Express Root Port 6 disabled (only four PCIe ports are allowed at a time)
- TPM Configuration fTPM
- HD-Audio DSP disabled
- Minimum Refresh Rate of 2x enabled
adapt PCIe CLKREQ routing configuration to TQMxE39M
print full MRC version information in setup main page
use OemSvcLoadDefaultSetupMenu for 3 x reset processing (no functional change)
fix not shown “press ESC for boot options”
fix not working Single Power Button Event
fix buffer not freed bug in CPLD driver (no functional change)
change look of memory channel information in setup main page
add GPIO/SD-Card and eDP to LVDS bridge information to TQMx86 setup page
add menu to configure fan PWM frequency to hardware monitor setup page
fix shown built-in display on Linux while LFP is disabled in BIOS
adapt setup menu: hide more menus
fix not working LVDS/eDP in GOP mode
fix GOP configuration
GPIO - fix LVDS backlight control not working under Windows
fix Win10 installation not working
NORTHWEST and SOUTHWEST GPIO configurations were adapted
switch ModPhyLane4 from USB to PCIe in TXE/SMIP configuration
change SPI clock to 50MHz, enable fast read support
do not use form browser
disable console redirection support
add TQ boot logo
adapt GOP and VBIOS configuration

On-board I2C devices

Bus	Destination	Function	Address 8-bit	Address 7-bit
SMBUS	CAT34TS02¹⁾	Thermal Sensor (CH-A)	0x30	0x18
	CAT34TS02	SPD EEPROM (CH-A)	0xA0	0x50
	CAT34TS02	Thermal Sensor (CH-B)	0x34	0x1A
	CAT34TS02	SPD EEPROM (CH-B)	0xA4	0x52
	NCT7802	Hardware Monitor	0x58	0x2C
	FPGA	non	non	non
	COMe Con.	any	N/A²⁾	N/A
I2C COMe	24LC32	COMe EEPROM	0xA0	0x50
I2C COMe	COMe Con.	any	N/A³⁾	N/A
I2C intern	PTN3460IBS-F2	LVDS-Bridge	0xC0	0x60

¹⁾

The CAT34TS02 is a combinated device with two addresses

²⁾

Availability depends on SODIMM vendor

³⁾

Availability and addresses depend on customer