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— | en:x86:tqmxe39m:data [2022/08/04 15:02] – external edit 127.0.0.1 | ||
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+ | ====== BIOS Overview ====== | ||
+ | <panel type=" | ||
+ | ^ BIOS Revision | ||
+ | | **Rev. 0109** | ||
+ | ^ ^^^^^ | ||
+ | | **Rev. 0108** | ||
+ | | ::: | ::: | ::: | 1x2 + 2x1 PCIe Lanes | TQMxE39M_5.12.30.28.34_PCIe_1x22x1.bin | ||
+ | | ::: | ::: | ::: | 1x4 PCIe Lanes | TQMxE39M_5.12.30.28.34_PCIe_1x4.bin | ||
+ | ^ ^^^^^ | ||
+ | | **Rev. 0107** | ||
+ | | ::: | ::: | ::: | 1x2 + 2x1 PCIe Lanes | TQMxE39M_5.12.30.28.30_PCIe_1x22x1.bin | ||
+ | | ::: | ::: | ::: | 1x4 PCIe Lanes | TQMxE39M_5.12.30.28.30_PCIe_1x4.bin | ||
+ | ^ ^^^^^ | ||
+ | | **Rev. 0106** | ||
+ | | ::: | ::: | ::: | 1x2 + 2x1 PCIe Lanes | TQMxE39M_5.12.30.28.22_PCIe_1x22x1.bin | ||
+ | ^ ^^^^^ | ||
+ | | **Rev. 0105** | ||
+ | | ::: | ::: | ::: | 1x4 PCIe Lanes | TQMxE39M_5.12.30.21.20_PCIe_1x4.bin | ||
+ | | ::: | ::: | ::: | 1x2 + 2x1 PCIe Lanes | TQMxE39M_5.12.30.21.20_PCIe_1x22x1.bin | ||
+ | ^ ^^^^^ | ||
+ | | **Rev. 0104** | ||
+ | | ::: | ::: | ::: | 1x4 PCIe Lanes | TQMxE39M_5.12.30.21.18_PCIe_1x4.bin | ||
+ | | ::: | ::: | ::: | 1x2 + 2x1 PCIe Lanes | TQMxE39M_5.12.30.21.18_PCIe_1x22x1.bin | ||
+ | ^ ^^^^^ | ||
+ | | **Rev. 0103** | ||
+ | | ::: | ::: | ::: | 1x4 PCIe Lanes | TQMxE39M_5.12.30.21.12_PCIe_1x4.bin | ||
+ | | ::: | ::: | ::: | 1x2 + 2x1 PCIe Lanes | TQMxE39M_5.12.30.21.12_PCIe_1x22x1.bin | ||
+ | ^ ^^^^^ | ||
+ | | **Rev. 0102** | ||
+ | | ::: | ::: | ::: | 1x4 PCIe Lanes | TQMxE39M_5.12.09.16.07_PCIe_1x4.bin | ||
+ | | ::: | ::: | ::: | 1x2 + 2x1 PCIe Lanes | TQMxE39M_5.12.09.16.07_PCIe_1x22x1.bin | ||
+ | ^ ^^^^^ | ||
+ | | **Rev. 0101** | ||
+ | | ::: | ::: | ::: | 1x4 PCIe Lanes | TQMxE39M_5.12.09.16.05_PCIe_1x4.bin | ||
+ | | ::: | ::: | ::: | 1x2 + 2x1 PCIe Lanes | TQMxE39M_5.12.09.16.05_PCIe_1x22x1.bin | ||
+ | ^ ^^^^^ | ||
+ | | **Rev. 0100** | ||
+ | | ::: | ::: | ::: | 1x4 PCIe Lanes | TQMxE39M_5.11.47.13.04_release_pcie1x4.bin | ||
+ | | ::: | ::: | ::: | 1x2 + 2x1 PCIe Lanes | TQMxE39M_5.11.47.13.04_release_pcie1x2_2x1.bin | ||
+ | </ | ||
+ | |||
+ | |||
+ | |||
+ | ====== Changelog ====== | ||
+ | <panel type=" | ||
+ | < | ||
+ | <panel title=" | ||
+ | * Insyde Core Update to tag 05.12.30.0033 plus additional IB trunks | ||
+ | * Close following security vulnerabilities | ||
+ | * CVE-2021-41839 | ||
+ | * CVE-2021-41841 | ||
+ | * CVE-2021-41840 | ||
+ | * CVE-2020-27339 | ||
+ | * CVE-2021-42060 | ||
+ | * CVE-2021-42113 | ||
+ | * CVE-2021-43522 | ||
+ | * CVE-2022-24069 | ||
+ | * CVE-2021-43615 | ||
+ | * CVE-2021-41837 | ||
+ | * CVE-2021-41838 | ||
+ | * CVE-2021-33627 | ||
+ | * CVE-2021-45971 | ||
+ | * CVE-2021-33626 | ||
+ | * CVE-2021-45970 | ||
+ | * CVE-2021-45969 | ||
+ | * CVE-2022-24030 | ||
+ | * CVE-2021-42554 | ||
+ | * CVE-2021-33625 | ||
+ | * CVE-2022-24031 | ||
+ | * CVE-2021-43323 | ||
+ | * CVE-2021-42059 | ||
+ | * Change Default configuration | ||
+ | * DTS < | ||
+ | * Disable Super I/Os not used | ||
+ | * SioNpcE285 | ||
+ | * Add verb table vor audio codec ALC262 | ||
+ | * Define USB Overcurrent pins | ||
+ | </ | ||
+ | <panel title=" | ||
+ | * Enable 2N mode for 8GB memory configuration | ||
+ | * Change Default Configuration | ||
+ | * eMMC Max Speed < | ||
+ | </ | ||
+ | |||
+ | <panel title=" | ||
+ | * update H2OUVE package to tag 05.31.28 | ||
+ | * add eMMC selection mode | ||
+ | * add new SD-MMC driver 1930 | ||
+ | </ | ||
+ | |||
+ | <panel title=" | ||
+ | * core update to tag_05.12.30.0028 | ||
+ | * Update SIC code to 1.1.1 | ||
+ | * improve realtime behavior | ||
+ | </ | ||
+ | |||
+ | <panel title=" | ||
+ | * Add Smart Battery Switch in BIOS Menu | ||
+ | * Support F1-Stepping: | ||
+ | * Update PMC Version | ||
+ | * Update Microcode | ||
+ | * Update SIC Version | ||
+ | * Update GPIO configuration to fix SD-Card functionality | ||
+ | </ | ||
+ | <panel title=" | ||
+ | * core update to tag_05.12.30.0021 | ||
+ | * close security gap spectre variant 2, 3a and 4 | ||
+ | * fix 'State after G3' issue | ||
+ | * fix USB 3.0 not working | ||
+ | * adapt setup menu | ||
+ | * unhide "< | ||
+ | * hide "BIOS Boot Source" | ||
+ | * fix H2OUVE default bug of LFP configuration | ||
+ | * integrate MRC patch to fix ECC issue (stop booting with postcode 30) | ||
+ | * use old InsydeCrPkg to fix boot stop with postcode 0x0C84 or 0x004D | ||
+ | * fix not working SPI flash GD 25LQ128D | ||
+ | * support coinless Apl-I BIOS | ||
+ | * support Smart Battery | ||
+ | </ | ||
+ | |||
+ | <panel title=" | ||
+ | * enable all PCIe Root Ports | ||
+ | * integrate new TXE FW 3.1.50.2222 | ||
+ | * Fix wrong negative temperature values | ||
+ | * Correct temperature string | ||
+ | * add UEFI-LVDS and adapt to TQMxE39M | ||
+ | * Adapt setup menu | ||
+ | * Unhide "Wake On PME" | ||
+ | * Unhide " | ||
+ | </ | ||
+ | |||
+ | <panel title=" | ||
+ | * update to Insyde BIOS 05.12.09.0016 | ||
+ | * update setup defaults (Memory Scrambler > disabled) | ||
+ | * adapt setup menu: hide more menus | ||
+ | * fix not working Single Power Button Event | ||
+ | * Implement fan scaling configuration | ||
+ | * update SioNct7802y package supporting Form Browser | ||
+ | * support form browser | ||
+ | * make IRQ 5, 6 and 7 adjustable | ||
+ | * fix not booting from external flash | ||
+ | * GPIO configuration were adapted to increase lifetime of pins | ||
+ | * fix not working Console Redirection | ||
+ | </ | ||
+ | |||
+ | <panel title=" | ||
+ | * update to Insyde BIOS 05.11.47.0013 | ||
+ | * update setup defaults | ||
+ | * PCI Express Root Port 1 enabled | ||
+ | * PCI Express Root Port 2 disabled (not connected on TQMxE39M) | ||
+ | * PCI Express Root Port 3 enabled | ||
+ | * PCI Express Root Port 4 enabled | ||
+ | * PCI Express Root Port 5 enabled | ||
+ | * PCI Express Root Port 6 disabled (only four PCIe ports are allowed at a time) | ||
+ | * TPM Configuration | ||
+ | * HD-Audio DSP | ||
+ | * Minimum Refresh Rate of 2x enabled | ||
+ | * adapt PCIe CLKREQ routing configuration to TQMxE39M | ||
+ | * print full MRC version information in setup main page | ||
+ | * use OemSvcLoadDefaultSetupMenu for 3 x reset processing (no functional change) | ||
+ | * fix not shown "press ESC for boot options" | ||
+ | * fix not working Single Power Button Event | ||
+ | * fix buffer not freed bug in CPLD driver (no functional change) | ||
+ | * change look of memory channel information in setup main page | ||
+ | * add GPIO/ | ||
+ | * add menu to configure fan PWM frequency to hardware monitor setup page | ||
+ | * fix shown built-in display on Linux while LFP is disabled in BIOS | ||
+ | * adapt setup menu: hide more menus | ||
+ | * fix not working LVDS/eDP in GOP mode | ||
+ | * fix GOP configuration | ||
+ | * GPIO - fix LVDS backlight control not working under Windows | ||
+ | * fix Win10 installation not working | ||
+ | * NORTHWEST and SOUTHWEST GPIO configurations were adapted | ||
+ | * switch ModPhyLane4 from USB to PCIe in TXE/SMIP configuration | ||
+ | * change SPI clock to 50MHz, enable fast read support | ||
+ | * do not use form browser | ||
+ | * disable console redirection support | ||
+ | * add TQ boot logo | ||
+ | * adapt GOP and VBIOS configuration | ||
+ | </ | ||
+ | </ | ||
+ | </ | ||
+ | ====== Downloads ====== | ||
+ | |||
+ | <panel type=" | ||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | </ | ||
+ | |||
+ | <panel type=" | ||
+ | |||
+ | [[https:// | ||
+ | [size=70%]MD5SUM: | ||
+ | |||
+ | </ | ||
+ | |||
+ | <panel type=" | ||
+ | |||
+ | [[https:// | ||
+ | |||
+ | [[https:// | ||
+ | |||
+ | </ | ||
+ | |||
+ | ====== On-board I2C devices ====== | ||
+ | |||
+ | <panel type=" | ||
+ | ^ Bus ^ Destination | ||
+ | | SMBUS | CAT34TS02((The CAT34TS02 is a combinated device with two addresses)) | ||
+ | | ::: | CAT34TS02 | ||
+ | | ::: | CAT34TS02 | ||
+ | | ::: | CAT34TS02 | ||
+ | | ::: | NCT7802 | ||
+ | | ::: | FPGA | non | non | non | | ||
+ | | ::: | COMe Con. | any | N/ | ||
+ | | I2C COMe | 24LC32 | ||
+ | | ::: | COMe Con. | any | N/ | ||
+ | | I2C intern | ||
+ | </ | ||