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| Both sides previous revision Previous revision Next revision | Previous revision | ||
| en:x86:tqmxe39s:bios_overview [2018/09/12 14:17] – created bujupib | en:x86:tqmxe39s:bios_overview [2022/08/04 15:02] (current) – external edit 127.0.0.1 | ||
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| - | ^ | + | ===== BIOS Overview ===== |
| - | | **5.12.09.16.03** | + | {{section> |
| - | ^ ^^^^^ | + | |
| - | | **5.12.09.16.02** | + | |
| - | ^ ^^^^^ | + | |
| ===== Changelog ===== | ===== Changelog ===== | ||
| - | + | {{section> | |
| - | ++++ 5.12.09.16.03 | | + | |
| - | *Integrate 8Gb memory chip configuration | + | |
| - | *correct GPIO adress | + | |
| - | ++++ | + | |
| - | ++++ 5.12.09.16.02 | | + | |
| - | *adapt setup menu (hide many entries) | + | |
| - | *update setup defaults to the TQMxE39S | + | |
| - | *correct LVDS resolutions in SioTqmx86 driver | + | |
| - | *configure GPI interrupt as level-triggered | + | |
| - | *add menu to enable GPI interrupt IRQ12 | + | |
| - | *add and adapt new TXE FW 3.1.50.2222 | + | |
| - | *fix wrong negative temperature | + | |
| - | *adapt temperature string | + | |
| - | *enable all PCIe roots | + | |
| - | *enable RTS/CTS in SioTqmx86 driver | + | |
| - | *identify two or four chip memory configuration | + | |
| - | *fix missing memory channels in SCU | + | |
| - | *CPU to DRAM mapping for LPDDR4 | + | |
| - | *Fix not working HSUARTS as COM Ports | + | |
| - | *Fix not working Over Current on USB0 | + | |
| - | *Fix not working USB3 after integrate TXE | + | |
| - | *Unhide " | + | |
| - | *Fix not working SPI Flash GD 25LQ128D | + | |
| - | *Disable UART Postcode support | + | |
| - | ++++ | + | |
| - | + | ||