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Embedded module TQMxE39S Documentation
BIOS Overview
BIOS Overview
| BIOS Revision | BIOS Version | TXE Firmware Version | PCI Configurations | BIOS Binary |
|---|---|---|---|---|
| Rev. 0105 | 5.12.30.28.07 | 3.1.65.2317 | 4×1 PCIe Lanes | TQMxE39S_5.12.30.28.07.bin |
| Rev. 0104 | 5.12.30.21.06 | 3.1.50.2238 | 4×1 PCIe Lanes | TQMxE39S_5.12.30.21.06.bin |
| 1×4 PCIe Lanes | TQMxE39S_5.12.30.21.06_PCIe_1x4.bin | |||
| 1×2 + 2×1 PCIe Lanes | TQMxE39S_5.12.30.21.06_PCIe_1x22x1.bin | |||
| Rev. 0103 | 5.12.30.21.05 | 3.1.50.2238 | 4×1 PCIe Lanes | TQMxE39S_5.12.30.21.05.bin |
| 1×4 PCIe Lanes | TQMxE39S_5.12.30.21.05_PCIe_1x4.bin | |||
| 1×2 + 2×1 PCIe Lanes | TQMxE39S_5.12.30.21.05_PCIe_1x22x1.bin | |||
| Rev. 0102 | 5.12.30.21.04 | 3.1.50.2238 | 4×1 PCIe Lanes | TQMxE39S_5.12.30.21.04.bin |
| 1×4 PCIe Lanes | TQMxE39S_5.12.30.21.04_PCIe_1x4.bin | |||
| 1×2 + 2×1 PCIe Lanes | TQMxE39S_5.12.30.21.04_PCIe_1x22x1.bin | |||
| Rev. 0101 | 5.12.09.16.03 | 3.1.50.2222 | 4×1 PCIe Lanes | TQMxE39S_5.12.09.16.03.bin |
| Rev. 0100 | 5.12.09.16.02 | 3.1.50.2222 | 4×1 PCIe Lanes | TQMxE39S_5.12.09.16.02.bin |
| 1×4 PCIe Lanes | TQMxE39S_5.12.09.16.02_PCIe_1x4.bin | |||
| 1×2 + 2×1 PCIe Lanes | TQMxE39S_5.12.09.16.02_PCIe_1x22x1.bin | |||
Changelog
Changelog
5.12.30.28.07
- Insyde core update to tag_05.12.30.0028
- Update SIC code to 1.1.1
- improve realtime behavior
5.12.30.21.06
- Adapt setup menu
- Unhide power limits
- Unhide DCI Enable
- USB Device functionality
- Unhide XDCI Support
- Adapt Strings of xDCI for better understanding
5.12.30.21.05
- Add Smart Battery Switch in BIOS Menu
- Support F1-Stepping
- Update PMC Version
- Update Microcode
- Update SIC Version
- Update GPIO configuration to fix SD-Card functionality
- Add Line In for Audio Code (MB-SMARC carrier)
- Switch SMBIOS data from debug to release version
5.12.30.21.04
- Adapt GPIO configuration to increase longevity of CPU GPIOs
- Fix not booting system if UartPostCodeSupport disabled
- Integrate 16Gb one rank memory configuration
- Integrate 8Gb memory chip configuration
- Enable Minimum Refresh Rate 2x
- Core update to tag_05.12.30.0021
- Close security gap spectre variant 2, 3a and 4
- Fix 'State after G3' issue
- Fix USB 3.0 not working
- Adapt setup default configuration
- USB Per-Port Control <enabled>
- Adapt setup menu
- Unhide “OS Reset Select”
- Hide “BIOS Boot Source” information
- Fix H2OUVE default bug of LFP configuration
- Integrate MRC patch to fix ECC issue (stop booting with postcode 30)
- Use old InsydeCrPkg to fix boot stop with postcode 0x0C84 or 0x004D
- Fix not working SPI flash GD 25LQ128D
- Support coinless Apl-I BIOS
- Support Smart Battery
- Integrate Smart Battery Switch in SCU
5.12.09.16.03
- Integrate 8Gb memory chip configuration
- Correct GPIO adress
5.12.09.16.02
- Adapt setup menu (hide many entries)
- Update setup defaults to the TQMxE39S
- Correct LVDS resolutions in SioTqmx86 driver
- Configure GPI interrupt as level-triggered
- Add menu to enable GPI interrupt IRQ12
- Add and adapt new TXE FW 3.1.50.2222
- Fix wrong negative temperature
- Adapt temperature string
- Enable all PCIe roots
- Enable RTS/CTS in SioTqmx86 driver
- Identify two or four chip memory configuration
- Fix missing memory channels in SCU
- CPU to DRAM mapping for LPDDR4
- Fix not working HSUARTS as COM Ports
- Fix not working Over Current on USB0
- Fix not working USB3 after integrate TXE
- Unhide “HDMI/DVI” to use 4K monitors
- Fix not working SPI Flash GD 25LQ128D
- Disable UART Postcode support
On-board I2C devices
TQMxE39S / MB-SMARC-1
| TQMxE39S | |||||
|---|---|---|---|---|---|
| Bus | Destination | Function | Address 8-bit | Address 7-bit | Comment |
| GP I2C | AT24C32E | EEPROM | 0xA0 | 0x50 | optional |
| SMBus | NCT7802 | Hardware Monitor | 0x58 | 0x2C | |
| MB-SMARC-1 | |||||
|---|---|---|---|---|---|
| Bus | Destination | Function | Address 8-bit | Address 7-bit | Comment |
| GP I2C | AT24C32E | EEPROM | 0xAE | 0x57 | |
| PCA9538ABS | I/O Expander | 0xE0 | 0x70 | ||
| TLV320AIC3104 | Audio Codec | 0xB0 | 0x58 | optional | |